Dr. M. Hassan Najafi received the B.Sc. degree in Computer Engineering-Hardware from the University of Isfahan, Isfahan, Iran, the M.Sc. degree in Computer Architecture from the University of Tehran, Tehran, Iran, and the Ph.D. degree in Electrical Engineering from the University of Minnesota, Twin Cities, USA, in 2011, 2014, and 2018, respectively. He is currently an Assistant Professor with the School of Computing and Informatics, University of Louisiana at Lafayette, Louisiana, USA. His research interests include stochastic and approximate computing, unary processing, computer architecture, low power VLSI design, and designing fault-tolerant systems.
Dr. Najafi’s research establishes some counterintuitive, yet fundamental, new design methodologies for designing digital stochastic systems. Conceptually, his works challenge the limitations of bit-stream-based computing; practically, they provide a means for designing significantly smaller, faster, and energy-efficient embedded systems. In recognition of his research, he received the Doctoral Dissertation Fellowship from the University of Minnesota and the Best Paper Award at the 2017 35th IEEE International Conference on Computer Design (ICCD). His work on Polysynchronous Clocking was selected as the Feature Paper of the Month in the Oct 2017 Issue of the IEEE Transactions on Computers.